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Dr.RVSS Avadhanulu |
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Project |
Computer |
Fortran IV Compiler System To Generate Executable Code |
TDC - 316 |
De-Assembler |
TDC - 316 |
Fortran IV Compiler System To Generate And Execute Interpretive Code |
TDC-312 |
Simulator of TDC -316 For Micro - 78 |
MICRO - 78 |
Single Precision Floating Point package |
TDC-316 |
Double Precision Floating Point Package |
TDC- 316 |
Mathematical Library System |
IRIS - 55 |
Simulator Of MCS - 8 |
TDC-316 |
Fortran IV System |
MICRO- 78 |
Memory Management System For FORTRAN Users |
IRIS -55 |
Spread Sheet System |
MICRO- 32 |
Sparse Matrix Handling System |
EC - 1030 |
Health Card Data Base Modeling System |
Action- Station |
